OM6229-昂瑞微 OnMicro

OM6221 is a single chip 2.4GHz transceiver with an embedded baseband protocol engine, suitable for ultralow power wireless applications. OM6221 is designed for operation in the worldwide ISM frequency band at 2.400 - 2.4835GHz.

To design a radio system with the OM6221, you simply need an MCU (microcontroller) and a few external passive components.

You can operate and configure the OM6221 through a Serial Peripheral Interface (SPI). The register map, which is accessible through the SPI, contains all configuration registers in the OM6221 and is accessible in all operation modes of the chip.

The embedded baseband protocol engine is based on packet communication and supports various modes from manual operation to advanced autonomous protocol operation. Internal FIFO ensure a smooth data flow between the radio front end and the system’s MCU. Protocol engine reduces system cost by handling all the high speed link layer operations.

The radio front end uses GFSK/FSK modulation. It has user configurable parameters like frequency channel, output power and air data rate. OM6221 supports an air data rate of 1Mbps, 2Mbps and low air rate. The high air data rates combined with two power saving modes make the OM6221 very suitable for ultralow power designs.

The addition of internal filtering to OM6221 has improved the margins for meeting RF regulatory standards.

Internal voltage regulators ensure a high Power Supply Rejection Ratio (PSRR) and a wide power supply range.

Fast 32-bit microcontroller:
Memory:
• Program memory: 16kB of OTP memory with security features and 512kB of external Flash memory
• Internal RAM: 4Kbyte
• Cache RAM: 1Kbyte
A number of on-chip hardware resources are available through programmable multi-purpose input/output pins:
• 11 GPIO
• Full duplex serial port-UART
• USB Device
• 6 PWMs
• External interrupts
High performance 2.4 GHz RF transceiver
• True single chip GFSK/FSK transceiver
• Enhanced Shock-Burst™ link layer support in HW:
• - Packet assembly/disassembly
• - Address and CRC computation
• - Auto ACK and retransmit
• On the air data rate 1 Mbps or 2 Mbps
• 125 RF channels operation, with 79 (2.402 GHz –2.480 GHz) channels within 2.400–2.4835 GHz
• Short switching time enable frequency hopping
System reset and power supply monitoring:
• On-chip power-on and brown-out reset
• Watchdog timer reset
• Software reset and power domain reset
• Power-fail comparator with programmable threshold and interrupt to MCU
On-chip timers:
• One 32-bit timer/counter operating at the system clock
• One 32-bit timer/counter operating at the low frequency clock (32kHz)
On-chip oscillators:
• 16 MHz crystal oscillator XOSC16M
• PLL
• 32kHz RC-oscillator RCOSC32K
Power management function:
• Low power design supporting fully static stop/standby/deepsleep
• Programmable MCU clock frequency
• On chip voltage regulators supporting low power mode
• Watchdog and wakeup functionality running in low power mode

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